Technical-Design · Meta-Conductor

DEMIURGE

The universal meta-conductor for rigorous technical design
7
verb design spine
domains, pluggable
0
un-cited claims
DEMIURGE
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Architecture as a Verb

Demiurge is the meta-conductor for technical design — a seven-verb spine that orchestrates rigorous, falsifiable engineering across domains: specify, architect, design, analyze in a loop, synthesize, verify, handoff. It is the sibling cosmology to Phanes — where Phanes reveals form by light, Demiurge gives form by shaping.

Most design tools help you draw faster. Demiurge does something different — it makes every design decision answer to a falsifier. A spec is not done until its acceptance criteria are verifier-bound; an analysis is not done until it closes its own loop; a handoff is not done until it ships the reasoning that earned it. The spine is the same whether the domain is a chip, a protein, or a policy.

Key Features

The Seven-Verb Spine: Specify, architect, design, analyze, synthesize, verify, handoff — each verb has a measurable closure condition. No verb completes on vibes.
Domain-Pluggable: Chip, protein, policy, system — the same seven-verb scaffold dispatches per-domain solvers and oracles. The spine is constant; the domain is a plugin.
Honesty as a Feature: Over-claim is forbidden by construction. Every verb declares its scope, its sources, and what it does not yet do — the audit trail ships with the design.

How It Works

01
Specify
Specify and architect: acceptance criteria are fixed as verifier-bound statements before any code.
02
Design ⟲ Analyze
Design re-enters the analyze verb in a loop until the analysis closes its own falsifier.
03
Synthesize
Synthesis emits the artifact; verify cross-checks it against the spec and the atlas-bound theorems it cites.
04
Handoff
Handoff ships the deliverable with its full falsifier trail and the chain of verbs that produced it.

A Connected Design Workflow

01

From Spec to Form

↳ Specify and architect run before any code.

Demiurge fixes the acceptance criteria as verifier-bound statements first. Architecture is committed against those criteria, not against a hunch — so the design has a falsifier from line one.

02

Iterate with Analysis

↳ Analyze is a fixed point, not a step.

The design re-enters the analyze verb until the analysis closes its own falsifier. The loop is the product — convergence is observed, never assumed.

03

Synthesize and Verify

↳ Artifacts cross-checked against the spec.

Synthesis emits the deliverable; verify checks it against the original specification and the atlas-bound theorems it cites. A synthesis that fails verify is not a deliverable.

04

Handoff with Provenance

↳ Every deliverable carries its history.

Handoff ships the falsifier trail and the full chain of verbs that produced the result — the receiving team inherits not just the artifact but the reasoning that earned it.

Platonic Timaeus

Demiurge is the Platonic shaper-to-Forms: it does not invent material, it gives technical material its rigorous shape. Paired with Phanes — the Orphic primordial revealer of Forms — as a sibling cosmology: two dancinlab brands, one continuous cosmology. Demiurge is downstream of hexa-lang and inherits its honesty rule; every verb is scoped, cited, and falsifiable.

GitHubsibling — PHANES